1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory device, and more particularly to an electrically erasable programmable nonvolatile semiconductor memory device.
2. Description of the Related Art
A flash memory cell, or a field effect transistor has a floating gate. The flash memory cell varies the threshold voltage in accordance with the amount of charge accumulated in the floating gate. The memory cell thereby nonvolatilely stores information based on differences in threshold voltage associated with levels of information.
The invention related to such the flash memory cell is disclosed in JP 9-265788A. The threshold voltage in this flash memory cell is generally around 1-2 [V] at the initial state. The threshold voltage becomes higher when a source of the memory cell is kept at 0 [V], a drain thereof is provided with a voltage of around 12 [V], and a gate thereof is provided with a voltage of around 6-8 [V], because electrons are injected into the floating gate (programming). If the threshold voltage is made higher (for example, 6 [V]) than a voltage (for example, 5 [V]) applied to a control gate at the time of reading, no current flows in the flash memory cell having the higher threshold voltage In contrast, current can flow in the flash memory cell at the initial state. In this way, it is possible to read the stored information.
If the control gate of the flash memory cell having the higher threshold voltage is kept at 0 [V], the drain thereof is kept open, and the source thereof is provided with a voltage of about 12 [V], electrons are drawn out of the floating gate. As a result, the threshold voltage can be lowered to almost the value at the initial state (erasing operation).
In such the flash memory cell, a certain current (Id) flows in drain-source, depending on a gate-source voltage (Vgs). However, a higher drain-source resistance may be made through production processes and so forth. This may result in a memory cell that cannot allow a current (Id) more than a certain value to flow in drain-source even if a certain gate-source voltage (Vgs) is applied. Such the memory cell is a defect memory cell and not suitable for memory cell use. Specifically, if a memory cell has a smaller Gm (defined by Gm=(∂Id/∂Vgs) than a certain value, it is a Gm-deteriorated memory cell and not suitable for memory cell use. Such the defect memory cell tends to be generated easily as the degree of memory-cell miniaturization increases.